1. Technical Field
The present invention relates to semiconductor devices and more particularly to a self-aligned metal oxide semiconductor field effect transistor (MOSFET) and integration methods.
2. Description of the Related Art
The performance enhancement of Si complementary metal-oxide-semiconductor (CMOS) has traditionally been achieved by device scaling. However, performance enhancement and the reduction of device size has become more challenging as devices achieve nanoscale dimensions. III-V compound semiconductors with high electron mobility and low electron effective mass have been suggested as a new channel material of n-metal-oxide-semiconductor field-effect transistors (n-MOSFETs). However, it is challenging to achieve III-V MOSFETs because there is no mature silicide-like process for III-V MOSFET junctions.